1. Field of the Invention
The invention relates to a phase-locked loop comprising
an input terminal for receiving a binary signal, PA1 a phase comparator having a first input coupled to the input terminal, having a second input, and having an output, PA1 a control-signal-controlled oscillator having an input for receiving a control signal, which input is coupled to the output of the phase comparator, and an output for supplying an oscillation signal of a given frequency in response to the control signal, which output is coupled to the second input of the phase comparator. The invention also relates to a phase comparator for use in the phase-locked loop and to a reproducing device including the phase-locked loop.
2. Description of the Related Art
A phase-locked loop of the type defined in the opening paragraph is generally known and is used to derive a clock signal from the binary signal. The binary signal may be an originally digital signal recorded on a record carrier. Upon reproduction an analog reproduction signal is obtained which is converted into a binary signal in a comparator circuit, this binary signal being then applied to the phase-locked loop. The clock signal can subsequently be used to recover the original digital signal during reproduction.
The known phase-locked loop has the drawback that variations in the nominal oscillator frequency of the oscillator give rise to timing errors in the clock signal.